Intel’s New Transistor Isn’t Just Smaller, It’s 3-D Too

Intel says its next generation of chip-making technology will not only get smaller, like all the previous generations before it, but will also move into the third dimension.
At an event in San Francisco, Intel disclosed what it described as a “significant breakthrough” in the design of transistors, the basic elements of computer chips. Instead of being essentially flat, Intel’s transistors, starting later this year, will boast a new 3-D design that Intel is calling a Tri-Gate transistor. Intel first disclosed that it was working on the technology in 2002, and indeed the notion of using 3-D structures to improve transistor performance has been well understood to science for a long time. But the big news is that Intel has pushed the technology along to the point that it can now deploy it in factories on a wide scale. The first PC and server chips will ship late this year. The first computers and servers using the new chips–Intel has assigned the chips the code name Ivy Bridge–will appear on the market in early 2012.
Intel plans to add the 3-D design to its 22-nanometer manufacturing process, which is the latest in its semi-annual process of shrinking the size of the elements found on an individual chip, a trend observed by Intel co-founder Gordon Moore 46 years ago this month. Its current manufacturing technology turns out chips with elements that are 32 nanometers in size. (A nanometer is a billionth of a meter.)
In the new design (old design versus new design in the picture above; click to enlarge) the traditional “flat” two-dimensional transistor is replaced with a thin “fin” that rises up from the silicon structure. Three gates–one on each side and one across the top–control the flow of electrical current. A conventional transistor has only the one gate on top. The added control, Intel says, gets more power flowing when the transistor is in its “on” state, and helps ensure that there’s almost no power flowing when it’s in its “off” state. Transistors are sometimes a little like light bulbs that never quite turn off entirely, and getting them to reach an “off” state that consumes no power has been a big engineering challenge over the years. (I wrote about it way back in 2003.) Cutting down the power they use when they’re “off” helps speed things up, but also conserves power, which is a big goal of chips going into notebooks, tablets and smart phones.
Stretching upward also helps boost the number of transistors that can be crammed into the available space. In the same way that skyscrapers help pack people into relatively small areas of land, the tri-gate structure allows transistors to be crowded even closer together than before. Down the road, they can get even higher. Intel says it expects the technology will go beyond its 22-nanometer manufacturing techniques and work with its next step to 14 nanometers, due sometime in 2013.
Intel produced a short video that tries to explain the shift, starring Intel Senior Fellow Mark Bohr. He’s the guy who gave President Obama the tour of Intel’s fab in Oregon in February. It’s below.